Enhanced descriptions from Syndetics:

Computer Systems and Networks provides an insight into the construction and operation of modern computer systems. Main computer sub-systems such as the CPU, primary and secondary storage devices, I/O systems, the display, etc, are reviewed. One chapter deals exclusively with digital circuits. Basic gates are described together with their use in forming combinational and sequential logic circuits. The functionality of the modern operating system is also described. Today, networking is an integral part of the computer and so the book introduces basic networking techniques and communications principles. By and large a bottom up approach is adopted in describing how the computer sub-systems are constructed and integrated so as to form the modern computer.

Table of contents provided by Syndetics

• Series preface (p. ix)
• Preface (p. xi)
• About the website (p. xiii)
• 1 Setting the scene (p. 1)
• 1.1 Introduction (p. 2)
• 1.2 What is a computer? (p. 2)
• 1.3 The stored program model (p. 6)
• 1.4 Forms of computer hardware (p. 8)
• 1.5 Basic computer operation (p. 9)
• 1.6 Binary (number base 2) (p. 10)
• 1.7 Bits and bytes (p. 13)
• 1.8 Summary (p. 14)
• 1.9 Review questions (p. 14)
• 1.10 Feedback on activities (p. 15)
• 2 Logic gates and simple digital circuits (p. 17)
• 2.1 Introduction (p. 18)
• 2.2 Logic gates and truth tables (p. 18)
• 2.3 Combinational and sequential circuits (p. 26)
• 2.4 Example combinational logic circuits (p. 30)
• 2.5 Example sequential logic circuits (p. 31)
• 2.6 Hexadecimal (p. 36)
• 2.7 Summary (p. 39)
• 2.8 Review questions (p. 39)
• 2.9 Feedback on activities (p. 40)
• 3 Using and accessing memory (p. 43)
• 3.1 Introduction (p. 44)
• 3.2 Concepts and terminology (p. 44)
• 3.3 Addresses (p. 45)
• 3.4 The fetch-execute cycle (p. 47)
• 3.5 The connection between the processor and the main memory (p. 48)
• 3.6 Processor registers (p. 50)
• 3.7 Machine code (p. 53)
• 3.8 Violatile and non-violate memory (p. 57)
• 3.9 Cache memory (p. 63)
• 3.10 Summary (p. 64)
• 3.11 Review questions (p. 64)
• 3.12 Feedback on activities (p. 65)
• 4 The computer: an interrupt-driven mathematical machine (p. 67)
• 4.1 Introduction (p. 68)
• 4.2 Representing positive and negative integers (p. 68)
• 4.3 Dealing with non-integer numbers (p. 73)
• 4.4 Character representation: ASCII (p. 80)
• 4.5 Representation of data and instructions (p. 83)
• 4.6 Interrupts (p. 84)
• 4.7 Interrupt priorities (p. 86)
• 4.8 Summary (p. 90)
• 4.9 Review questions (p. 91)
• 4.10 Feedback on activities (p. 91)
• 5 Storage devices and data transfer issues (p. 93)
• 5.1 Introduction (p. 94)
• 5.2 Primary and secondary storage: capacity, speed and cost (p. 94)
• 5.3 Secondary storage using magnetisation (p. 96)
• 5.4 Secondary storage using optical techniques (p. 103)
• 5.5 Serial and parallel interfaces (p. 105)
• 5.6 Signal transfer (p. 106)
• 5.7 Summary (p. 110)
• 5.8 Review questions (p. 112)
• 5.9 Feedback on activities (p. 112)
• 6 Interfacing to the physical world (p. 115)
• 6.1 Introduction (p. 116)
• 6.2 Digital-to-analogue conversion (p. 116)
• 6.3 Analogue-to-digital conversion (p. 119)
• 6.4 Signals (p. 122)
• 6.5 Interaction devices (p. 124)
• 6.6 The display (p. 129)
• 6.7 Display metrics (p. 135)
• 6.8 Summary (p. 136)
• 6.9 Review questions (p. 137)
• 6.10 Feedback on activities (p. 137)
• 7 The central processing unit (p. 141)
• 7.1 Introduction (p. 142)
• 7.2 General processor architecture (p. 142)
• 7.3 The Register Transfer Language (RTL) (p. 150)
• 7.4 The stack (p. 151)
• 7.5 The overall architecture of a simple processor model (p. 155)
• 7.6 Summary (p. 156)
• 7.7 Review questions (p. 156)
• 7.8 Feedback on activities (p. 157)
• 8 Aspects of the operating system (p. 161)
• 8.1 Introduction (p. 162)
• 8.2 Basic input/output system (BIOS) (p. 162)
• 8.3 The reset vector (p. 163)
• 8.4 Operating system (p. 164)
• 8.5 Types of operating systems (p. 168)
• 8.6 Virtual memory (p. 173)
• 8.7 Multi-tasking (p. 175)
• 8.9 Summary (p. 177)
• 8.10 Review questions (p. 177)
• 8.11 Feedback on activities (p. 178)
• 9 Networking computers (p. 181)
• 9.1 Introduction (p. 182)
• 9.2 Bandwidth bit-rate and latency (p. 182)
• 9.3 Types of network (p. 188)
• 9.4 Network topologies (p. 189)
• 9.5 The layered approach to computer communications (p. 192)
• 9.6 Standards (p. 194)
• 9.7 The OSI model (p. 196)
• 9.8 The TCP/IP protocol (p. 201)
• 9.9 Summary (p. 206)
• 9.10 Review questions (p. 207)
• 9.11 Feedback on activities (p. 210)
• 10 Transmission media and data communications (p. 213)
• 10.1 Introduction (p. 214)
• 10.2 Concerning signals (p. 214)
• 10.3 Data transmission media (p. 228)
• 10.4 Contention-based access (CSMA/CD) (p. 224)
• 10.5 Ethernet (p. 230)
• 10.6 The Ethernet frame (p. 236)
• 10.7 Token passing (p. 237)
• 10.8 Summary (p. 239)
• 10.9 Review questions (p. 239)
• 10.10 Feedback on activities (p. 240)
• 11 The Internet (p. 243)
• 11.1 Introduction (p. 244)
• 11.2 Connection-oriented and connectionless internetworking (p. 244)
• 11.3 Internetworking (p. 246)
• 11.4 Data encapsulation (p. 251)
• 11.5 Internet Protocol (IP) (p. 251)
• 11.6 Internet addressing (p. 254)
• 11.7 Address resolution (p. 260)
• 11.8 The Domain Name System (DNS) (p. 262)
• 11.9 Summary (p. 263)
• 11.10 Review questions (p. 264)
• 11.11 Feedback on activities (p. 266)
• 12 Routers, satellites and security (p. 269)
• 12.1 Introduction (p. 270)
• 12.2 Routers in networks (p. 270)
• 12.2 The process of routing (p. 271)
• 12.3 Satellite communications (p. 275)
• 12.4 Cryptography (p. 278)
• 12.5 Public key encryption (p. 279)
• 12.6 Summary (p. 282)
• 12.7 Review questions (p. 282)
• 12.8 Feedback on activities (p. 284)
• Answers to review questions (p. 287)
• Index (p. 307)

Author notes provided by Syndetics