Enhanced descriptions from Syndetics:

This engineering reference book covers the theoretical and practical aspects of high-speed digital signalling at the level of the printed circuit board.

Table of contents provided by Syndetics

• Preface (p. xiii)
• Chapter 1 Characteristics and Construction of Printed Wiring Boards (p. 1)
• 1.1 Introduction (p. 1)
• 1.2 Unit System (p. 1)
• 1.3 PWB Construction (p. 2)
• 1.3.1 Resins (p. 3)
• 1.3.2 Alternate Resin Systems (p. 3)
• 1.3.3 Reinforcements (p. 5)
• 1.3.4 Variability in Building Stackups (p. 6)
• 1.3.5 Mixing Laminate Types (p. 7)
• 1.4 PWB Traces (p. 7)
• 1.4.1 Copper Cladding (p. 8)
• 1.4.2 Copper Weights and Thickness (p. 9)
• 1.4.3 Plating the Surface Traces (p. 9)
• 1.4.4 Trace Etch Shape Effects (p. 9)
• 1.5 Vias (p. 10)
• 1.5.1 Via Aspect Ratio (p. 13)
• 1.6 Surface Finishes and Solder Mask (p. 14)
• 1.7 Summary (p. 14)
• References (p. 15)
• Chapter 2 Resistance of Etched Conductors (p. 17)
• 2.1 Introduction (p. 17)
• 2.2 Resistance at Low Frequencies (p. 17)
• 2.3 Loop Resistance and the Proximity Effect (p. 20)
• 2.3.1 Resistance Matrix (p. 21)
• 2.3.2 Proximity Effect (p. 22)
• 2.4 Resistance Increase with Frequency: Skin Effect (p. 24)
• 2.5 Hand Calculations of Frequency-Dependent Resistance (p. 27)
• 2.5.1 Return Path Resistance (p. 28)
• 2.5.2 Conductor Resistance (p. 28)
• 2.5.3 Total Loop Resistance (p. 29)
• 2.6 Resistance Increase Due to Surface Roughness (p. 29)
• 2.7 Summary (p. 30)
• References (p. 30)
• Chapter 3 Capacitance of Etched Conductors (p. 31)
• 3.1 Introduction (p. 31)
• 3.2 Capacitance and Charge (p. 31)
• 3.2.1 Dielectric Constant (p. 32)
• 3.3 Parallel Plate Capacitor (p. 33)
• 3.4 Self and Mutual Capacitance (p. 35)
• 3.5 Capacitance Matrix (p. 37)
• 3.6 Dielectric Losses (p. 39)
• 3.6.1 Reactance and Displacement Current (p. 40)
• 3.6.2 Loss Tangent (p. 40)
• 3.6.3 Calculating Loss Tangent and Conductance G (p. 41)
• 3.7 Environmental Effects on Laminate [epsilon subscript r] and Loss Tangent (p. 43)
• 3.7.1 Temperature Effects (p. 44)
• 3.7.2 Moisture Effects (p. 44)
• 3.8 Summary (p. 45)
• References (p. 45)
• Chapter 4 Inductance of Etched Conductors (p. 47)
• 4.1 Introduction (p. 47)
• 4.2 Field Theory (p. 47)
• 4.2.1 Permeability (p. 48)
• 4.2.2 Inductance (p. 48)
• 4.2.3 Internal and External Inductance (p. 49)
• 4.2.4 Partial Inductance (p. 49)
• 4.2.5 Reciprocity Principal and Transverse Electromagnetic Mode (p. 50)
• 4.3 Circuit Behavior of Inductance (p. 51)
• 4.3.1 Inductive Voltage Drop (p. 53)
• 4.3.2 Inductive Reactance (p. 54)
• 4.4 Inductance Matrix (p. 55)
• 4.4.1 Using the Reciprocity Principle to Obtain the Inductance Matrix from a Capacitance Matrix (p. 55)
• 4.5 Mutual Inductance (p. 55)
• 4.5.1 Coupling Coefficient (p. 56)
• 4.5.2 Beneficial Effects of Mutual Inductance (p. 57)
• 4.5.3 Deleterious Effects of Mutual Inductance (p. 59)
• 4.6 Hand Calculations for Inductance (p. 60)
• 4.6.1 Inductance of a Wire Above a Return Plane (p. 60)
• 4.6.2 Inductance of Side-by-Side Wires (p. 61)
• 4.6.3 Inductance of Parallel Plates (p. 61)
• 4.6.4 Inductance of Microstrip (p. 63)
• 4.6.5 Inductance of Stripline (p. 63)
• 4.7 Summary (p. 64)
• References (p. 65)
• Chapter 5 Transmission Lines (p. 67)
• 5.1 Introduction (p. 67)
• 5.2 General Circuit Model of a Lossy Transmission Line (p. 67)
• 5.2.1 Relationship Between [omega]L and R (p. 70)
• 5.2.2 Relationship Between [omega]C and G (p. 70)
• 5.3 Impedance (p. 71)
• 5.3.1 Calculating Impedance (p. 72)
• 5.4 Traveling Waves (p. 73)
• 5.4.1 Propagation Constant (p. 74)
• 5.4.2 Phase Shift, Delay, and Wavelength (p. 75)
• 5.4.3 Phase Constant at High Frequencies When R and G Are Small (p. 78)
• 5.4.4 Attenuation (p. 79)
• 5.4.5 Neper and Decibel Conversion (p. 80)
• 5.5 Summary and Worked Examples (p. 82)
• References (p. 86)
• Chapter 6 Return Paths and Power Supply Decoupling (p. 87)
• 6.1 Introduction (p. 87)
• 6.2 Proper Return Paths (p. 87)
• 6.2.1 Return Paths of Ground-Referenced Signals (p. 89)
• 6.2.2 Stripline (p. 90)
• 6.3 Stripline Routed Between Power and Ground Planes (p. 90)
• 6.3.1 When Power Plane Voltage Is the Same as Signal Voltage (p. 90)
• 6.3.2 When Power Plane Voltage Differs from Signal Voltage (p. 93)
• 6.3.3 Power System Inductance (p. 94)
• 6.4 Split Planes, Motes, and Layer Changes (p. 95)
• 6.4.1 Motes (p. 95)
• 6.4.2 Layer Changes (p. 98)
• 6.5 Connectors and Dense Pin Fields (p. 98)
• 6.5.1 Plane Perforation (p. 99)
• 6.5.2 Antipads (p. 99)
• 6.5.3 Nonfunctional Pads (p. 102)
• 6.5.4 Guidelines for Routing Through Dense Pin Fields (p. 103)
• 6.6 Power Supply Bypass/Decoupling Capacitance (p. 105)
• 6.6.1 Power Supply Integrity (p. 106)
• 6.6.2 Distributed Power Supply Interconnect Model (p. 110)
• 6.7 Connecting to Decoupling Capacitors (p. 112)
• 6.7.1 Via Inductance (p. 112)
• 6.8 Summary (p. 114)
• References (p. 115)
• Chapter 7 Serial Communication, Loss, and Equalization (p. 117)
• 7.1 Introduction (p. 117)
• 7.2 Harmonic Contents of a Data Stream (p. 117)
• 7.2.1 Line Spectra (p. 119)
• 7.2.2 Combining Harmonics to Create a Pulse (p. 120)
• 7.2.3 The Fourier Integral (p. 122)
• 7.2.4 Rectangular Pulses with Nonzero Rise Times (p. 123)
• 7.3 Line Codes (p. 125)
• 7.4 Bit Rate and Data Rate (p. 126)
• 7.5 Block Codes Used in Serial Transmission (p. 128)
• 7.6 ISI (p. 130)
• 7.6.1 Dispersion (p. 130)
• 7.6.2 Lone 1-Bit Pattern (p. 131)
• 7.7 Eye Diagrams (p. 132)
• 7.8 Equalization and Preemphasis (p. 134)
• 7.8.1 Preemphasis (p. 134)
• 7.8.2 Passive Equalizers (p. 137)
• 7.8.3 Passive RC Equalizer (p. 139)
• 7.9 DC-Blocking Capacitors (p. 140)
• 7.9.1 Calculating the Coupling Capacitor Value (p. 142)
• 7.10 Summary (p. 145)
• References (p. 146)
• Chapter 8 Single-Ended and Differential Signaling and Crosstalk (p. 149)
• 8.1 Introduction (p. 149)
• 8.2 Odd and Even Modes (p. 149)
• 8.2.1 Circuit Description of Odd and Even Modes (p. 150)
• 8.2.2 Coupling Coefficient (p. 153)
• 8.2.3 Stripline and Microstrip Odd- and Even-Mode Timing (p. 155)
• 8.2.4 Effects of Spacing on Impedance (p. 157)
• 8.3 Multiconductor Transmission Lines (p. 158)
• 8.3.1 Bus Segmentation for Simulation Purposes (p. 159)
• 8.3.2 Switching Behavior of a Wide Bus (p. 160)
• 8.3.3 Simulation Results for Loosely Coupled Lines (p. 161)
• 8.3.4 Simulation Results for Tightly Coupled Lines (p. 162)
• 8.3.5 Data-Dependent Timing Jitter in Multiconductor Transmission Lines (p. 164)
• 8.4 Differential Signaling, Termination, and Layout Rules (p. 165)
• 8.4.1 Differential Signals and Noise Rejection (p. 165)
• 8.4.2 Differential Impedance and Termination (p. 166)
• 8.4.3 Reflection Coefficient and Return Loss (p. 170)
• 8.4.4 PWB Layout Rules When Routing Differential Pairs (p. 172)
• 8.5 Crosstalk (p. 173)
• 8.5.1 Coupled-Line Circuit Model (p. 175)
• 8.5.2 NEXT and FEXT Coupling Factors (p. 177)
• 8.5.3 Using K[subscript b] to Predict NEXT (p. 178)
• 8.5.4 Using K[subscript f] to Predict FEXT (p. 179)
• 8.5.5 Guard Traces (p. 179)
• 8.5.6 Crosstalk Worked Example (p. 180)
• 8.5.7 Crosstalk Summary (p. 182)
• 8.6 Summary (p. 182)
• References (p. 183)
• Chapter 9 Characteristics of Printed Wiring Stripline and Microstrips (p. 185)
• 9.1 Introduction (p. 185)
• 9.2 Stripline (p. 185)
• 9.2.1 Time of Flight (p. 186)
• 9.2.2 Impedance Relationship Between Trace Width, Thickness, and Plate Spacing (p. 187)
• 9.2.3 Mask Biasing to Obtain a Specific Impedance (p. 189)
• 9.2.4 Hand Calculation of Z[subscript o] (p. 189)
• 9.2.5 Stripline Fabrication (p. 191)
• 9.3 Microstrip (p. 193)
• 9.3.1 Exposed Microstrip (p. 194)
• 9.3.2 Solder Mask and Embedded Microstrip (p. 196)
• 9.4 Losses in Stripline and Microstrip (p. 197)
• 9.4.1 Dielectric Loss (p. 199)
• 9.4.2 Conductor Loss (p. 199)
• 9.5 Microstrip and Stripline Differential Pairs (p. 201)
• 9.5.1 Broadside Coupled Stripline (p. 201)
• 9.5.2 Edge-Coupled Stripline (p. 204)
• 9.5.3 Edge-Coupled Microstrip (p. 205)
• 9.6 Summary (p. 206)
• References (p. 207)
• Chapter 10 Surface Mount Capacitors (p. 209)
• 10.1 Introduction (p. 209)
• 10.2 Ceramic Surface Mount Capacitors (p. 209)
• 10.2.1 Dielectric Temperature Characteristics Classification (p. 209)
• 10.2.2 Body Size Coding (p. 211)
• 10.2.3 Frequency Response (p. 212)
• 10.2.4 Inductive Effects: ESL (p. 214)
• 10.2.5 Dielectric and Conductor Losses: ESR (p. 215)
• 10.2.6 Leakage Currents: Insulation Resistance (p. 218)
• 10.2.7 Electrical Model (p. 219)
• 10.2.8 MLCC Capacitor Aging (p. 220)
• 10.2.9 Capacitance Change with DC Bias and Frequency (p. 221)
• 10.2.10 MLCC Usage Guidelines (p. 222)
• 10.3 SMT Tantalum Capacitors (p. 223)
• 10.3.1 Body Size Coding (p. 223)
• 10.3.2 Frequency Response (p. 224)
• 10.3.3 Electrical Model (p. 225)
• 10.3.4 Aging (p. 225)
• 10.3.5 Effects of DC Bias, Temperature, and Relative Humidity (p. 225)
• 10.3.6 Failure of Tantalum Capacitors (p. 226)
• 10.3.7 ESR and Self Heating: Voltage and Temperature Derating (p. 227)
• 10.3.8 Usage Guidelines (p. 227)
• 10.4 Replacing Tantalum with High-Valued Ceramic Capacitors (p. 228)
• References (p. 230)
• Appendix Conversion Factors (p. 231)
• About the Author (p. 233)
• Index (p. 235)

Author notes provided by Syndetics