Enhanced descriptions from Syndetics:

This book uses a "learn by doing" approach to introduce the concepts and techniques of VHDL and FPGA to designers through a series of hands-on experiments. FPGA Prototyping by VHDL Examples provides a collection of clear, easy-to-follow templates for quick code development; a large number of practical examples to illustrate and reinforce the concepts and design techniques; realistic projects that can be implemented and tested on a Xilinx prototyping board; and a thorough exploration of the Xilinx PicoBlaze soft-core microcontroller.

Table of contents provided by Syndetics

• Preface
• Acknowledgments
• Part I Basic Digital Circuits
• 1 Gate-level combinational circuit
• 1.1 Introduction
• 1.2 General description
• 1.2.1 Basic lexical rules
• 1.2.2 Library and package
• 1.2.3 Entity declaration
• 1.2.4 Data type and operators
• 1.2.5 Architecture body
• 1.2.6 Code of a 2-bit comparator
• 1.3 Structural description
• 1.4 Testbench
• 1.5 Bibliographic notes
• 1.6 Suggested experiments
• 1.6.1 Code for gate-level greater-than circuit
• 1.6.2 Code for gate-level binary decoder
• 2 Overview of FPGA and EDA software
• 2.1 Introduction
• 2.2 FPGA
• 2.2.1 Overview of general FPGA device
• 2.2.2 Overview of Xilinx Spartan-3 device
• 2.3 Overview of Digilent S3 board
• 2.4 Design flow
• 2.5 Overview of Xilinx ISE project navigator
• 2.6 Short tutorial of ISE project navigator
• 2.6.1 Create the design project and HDL codes
• 2.6.2 Create a testbench and perform RTL simulation
• 2.6.3 Add a constraint file and synthesize and implement the code
• 2.6.4 Generate and download the configuration file to FPGA devices
• 2.7 Short tutorial of ModelSim HDL simulator
• 2.8 Bibliographic notes
• 2.9 Suggested experiments
• 2.9.1 Gate-level greater-than circuit
• 2.9.2 Gate-level binary decoder
• 3 RT-level combinational circuit
• 3.1 Introduction
• 3.2 RT-level components
• 3.2.1 Relational operators
• 3.2.2 Arithmetic operators
• 3.2.3 Other synthesis related VHDL constructs
• 3.2.4 Summary
• 3.3 Routing circuit with concurrent assignment statements
• 3.3.1 Conditional signal assignment statement
• 3.3.2 Selected signal assignment statement
• 3.4 Modeling with process
• 3.4.1 Process
• 3.4.2 Sequential signal assignment statement
• 3.5 Routing circuit with if and case statements
• 3.5.1 If statement
• 3.5.2 Case statement
• 3.5.3 Comparison to concurrent statements
• 3.5.4 Unintended memory
• 3.6 Constant and generic
• 3.6.1 Constant
• 3.6.2 Generic
• 3.7 Design examples
• 3.7.1 Hexadecimal digit to seven-segment LED decoder
• 3.7.2 Sign-magnitude adder
• 3.7.3 Barrel shifter
• 3.7.4 A simplified floating-point adder
• 3.8 Bibliographic notes
• 3.9 Suggested experiments
• 3.9.1 Multi-function barrel shifter
• 3.9.2 Dual priority encoder
• 3.9.3 BCD incrementor
• 3.9.4 Floating-point greater-than circuit
• 3.9.5 Floating-point and signed integer conversion circuit
• 3.9.6 Enhanced floating-point adder
• 4 Regular Sequential Circuit
• 4.1 Overview
• 4.1.1 D FF and register
• 4.1.2 Synchronous system
• 4.1.3 Code development
• 4.2 HDL code of FF and register
• 4.2.1 D FF
• 4.2.2 Register
• 4.2.3 Register File
• 4.2.4 Storage components in Spartan-3 deviceXilinx specific
• 4.3 Simple design examples
• 4.3.1 Shift register
• 4.3.2 Binary counter and variant
• 4.4 Testbench for sequential circuits
• 4.5 Case study
• 4.5.1 LED time multiplexing circuit
• 4.5.2 Stopwatch
• 4.5.3 FIFO buffer
• 4.6 Bibliographic notes
• 4.7 Suggested experiments
• 4.7.1 Programmable square wave generator
• 4.7.2 PWM and LED dimmer
• 4.7.3 Rotating square circuit
• 4.7.4 Heartbeat circuit
• 4.7.5 Rotating LED banner circuit
• 4.7.6 Enhanced stopwatch
• 4.7.7 Stack
• 5 FSM
• 5.1 Overview
• 5.1.1 Mealy and Moore outputs
• 5.1.2 FSM representation
• 5.2 FSM code development
• 5.3 Design examples
• 5.3.1 Rising edge detector
• 5.3.2 Debouncing circuit
• 5.3.3 Testing circuit
• 5.4 Bibliographic notes
• 5.5 Suggested experiments
• 5.5.1 Dual-edge detector
• 5.5.2 Altern

Author notes provided by Syndetics

PONG P. CHU, P H D, is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.